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| Octal Transceiver/Register With 3 State Outputs (Non Inverting) The MC74AC/ACT652 consists of registered bus transceiver circuits, with outputs, D-type flip-flops and control circuitry providing multiplexed transmission of data directly from the input bus or from the internal storage registers. Data on the A or B bus will be loaded into the respective registers on the LOW-to-HIGH transition of the appropriate clock pin (CAB or CBA). The four fundamental data handling functions available are illustrated in Figures 1 to 4. * * * * * * * Independent Registers for A and B Buses Multiplexed Real-Time and Stored Data Transfers Choice of True and Inverting Data Paths 3-State Outputs 300 mil Slim Dual-in-Line Package Outputs Source/Sink 24 mA ACT652 Has TTL Compatible Inputs REAL TIME TRANSFER A-BUS TO B-BUS A-BUS REG B-BUS REG REG B-BUS REAL TIME TRANSFER B-BUS TO A-BUS A-BUS REG MC74AC652 MC74ACT652 OCTAL TRANSCEIVER/ REGISTER WITH 3-STATE OUTPUTS (NON-INVERTING) 24 1 N SUFFIX CASE 724-03 PLASTIC PACKAGE 24 1 Figure 1 STORAGE FROM BUS TO REGISTER A-BUS REG B-BUS REG REG Figure 2 TRANSFER FROM REGISTER TO BUS A-BUS REG B-BUS DW SUFFIX CASE 751E-04 SOIC PACKAGE PIN NAMES A0 - A7 B0 - B7 CAB, CBA SAB, SBA GAB, GBA Data Register A Inputs Data Register A Outputs Data Register B Inputs Data Register B Outputs Clock Pulse Inputs Transmit/Receive Inputs Output Enable Inputs Figure 3 MAXIMUM RATINGS* Symbol VCC Vin Vout Iin Iout ICC Tstg Figure 4 Parameter DC Supply Voltage (Referenced to GND) DC Input Voltage (Referenced to GND) DC Output Voltage (Referenced to GND) DC Input Current, per Pin DC Output Sink/Source Current, per Pin DC VCC or GND Current per Output Pin Storage Temperature Value -0.5 to +7.0 -0.5 to VCC + 0.5 -0.5 to VCC + 0.5 20 50 50 -65 to +150 Unit V V V mA mA mA C * Maximum Ratings are those values beyond which damage to the device may occur. Functional operation should be restricted to the Recommended Operating Conditions. FACT DATA 5-1 MC74AC652 MC74ACT652 Pinout: 24-Lead Plastic Package (Top View) VCC 24 CBA 23 SBA 22 GBA 21 B0 20 B1 19 B2 18 B3 17 B4 16 B5 15 B6 14 B7 13 1 CAB 2 SAB 3 GAB 4 A0 5 A1 6 A2 7 A3 8 A4 9 A5 10 A6 11 A7 12 GND LOGIC SYMBOL CAB SAB GAB CBA SBA GBA B0 B1 B2 B3 B4 B5 B6 B7 A0 A1 A2 A3 A4 A5 A6 A7 LOGIC DIAGRAM GBA CBA SBA CAB SAB GAB 1 OF 8 CHANNELS D0 C0 B0 A0 D0 C0 TO 7 OTHER CHANNELS Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays. FACT DATA 5-2 MC74AC652 MC74ACT652 FUNCTION TABLE Inputs GAB GBA CAB CBA SAB SBA Data I/O* Operation or Function A0 - A7 B0 - B7 L L X H L L L L H H H H H H H X L L L H H L H or L H or L X X X H or L H or L H or L H or L X H or L X X H or L X X X X** X X X X L H H X X X X X X** L H X X H Input Input Input Unspecified* Output Output Input Output Input Unspecified* Output Input Input Input Output Output Isolation Store A and B Data Store A, Hold B Store A in Both Registers Hold A, Store B Store B in Both Registers Real-Time B Data to A Bus Stored B Data to A Bus Real-Time A Data to B Bus Stored A Data to B Bus Stored A Data to B Bus and Stored B Data to A Bus * The data output functions may be enabled or disabled by various signals at the GBA and GAB inputs. Data input functions are always enabled; i.e., data at the bus pins will be stored on every LOW-to-HIGH transition of the appropriate clock inputs. ** Select control = L: clocks can occur simultaneously. H = HIGH Voltage Level; L = LOW Voltage Level; X = Immaterial; = LOW-to-HIGH Transition RECOMMENDED OPERATING CONDITIONS Symbol VCC Vin, Vout Supply Voltage DC Input Voltage, Output Voltage (Ref. to GND) VCC @ 3.0 V tr, tf Input Rise and Fall Time (Note 1) AC Devices except Schmitt Inputs VCC @ 4.5 V VCC @ 5.5 V tr, tf TJ TA IOH IOL Input Rise and Fall Time (Note 2) ACT Devices except Schmitt Inputs Junction Temperature (PDIP) Operating Ambient Temperature Range Output Current -- HIGH Output Current -- LOW -40 25 VCC @ 4.5 V VCC @ 5.5 V Parameter AC ACT Min 2.0 4.5 0 150 40 25 10 ns/V 8.0 140 85 -24 24 C C mA mA ns/V Typ 5.0 5.0 Min 6.0 5.5 VCC V Unit V 1. Vin from 30% to 70% VCC; see individual Data Sheets for devices that differ from the typical input rise and fall times. 2. Vin from 0.8 V to 2.0 V; see individual Data Sheets for devices that differ from the typical input rise and fall times. FACT DATA 5-3 MC74AC652 MC74ACT652 DC CHARACTERISTICS 74AC Symbol Parameter VCC (V) TA = +25C Typ VIH Minimum High Level Input Voltage 3.0 4.5 5.5 3.0 4.5 5.5 3.0 4.5 5.5 3.0 4.5 5.5 VOL Minimum Low Level Output Voltage 3.0 4.5 5.5 3.0 4.5 5.5 IIN IOZT Maximum Input Leakage Current Maximum 3-State Current IOLD IOHD ICC Minimum Dynamic Output Current Maximum Quiescent Supply Current 5.5 5.5 5.5 8.0 75 -75 80 mA mA A 5.5 0.002 0.001 0.001 1.5 2.25 2.75 1.5 2.25 2.75 2.99 4.49 5.49 74AC TA = -40C to +85C Unit Conditions Guaranteed Limits 2.1 3.15 3.85 0.9 1.35 1.65 2.9 4.4 5.4 2.56 3.86 4.86 0.1 0.1 0.1 0.36 0.36 0.36 0.1 2.1 3.15 3.85 0.9 1.35 1.65 2.9 4.4 5.4 2.46 3.76 4.76 0.1 0.1 0.1 0.44 0.44 0.44 1.0 V VOUT = 0.1 V or VCC - 0.1 V VOUT = 0.1 V or VCC - 0.1 V IOUT = - 50 A V *VIN = VIL or VIH - 12 mA IOH - 24 mA - 24 mA IOUT = 50 A V *VIN = VIL or VIH 12 mA IOL 24 mA 24 mA VI = VCC, GND VI (OE) = VIL, VIH VI = VCC, GND VO= VCC, GND VOLD = 1.65 V Max VOHD = 3.85 V Min VIN = VCC or GND VIL Maximum Low Level Input Voltage V VOH Minimum High Level Output Voltage V V A 5.5 0.6 6.0 A * All outputs loaded; thresholds on input associated with output under test. Maximum test duration 2.0 ms, one input loaded at a time. Note: IIN and ICC @ 3.0 V are guaranteed to be less than or equal to the respective limit @ 5.5 V. FACT DATA 5-4 MC74AC652 MC74ACT652 AC CHARACTERISTICS 74AC Symbol Parameter VCC* (V) TA = +25C CL = 50 pF Min tPLH tPHL tPLH tPHL tPLH tPHL tPZH tPZL tPHZ tPLZ Propagation Delay CPBA or CPAB to An or Bn Propagation Delay CPBA or CPAB to An or Bn Propagation Delay A or B to Bn or An Propagation Delay A or B to Bn or An Propagation Delay SBA or SAB to An or Bn Propagation Delay SBA or SAB to An or Bn Output Enable Time OEBA to An Output Enable Time OEBA to An Output Disable Time OEBA to An Output Disable Time OEBA to An 3.0 5.0 3.0 5.0 3.0 5.0 3.0 5.0 3.0 5.0 3.0 5.0 3.0 5.0 3.0 5.0 3.0 5.0 3.0 5.0 4.0 2.5 3.0 2.0 3.0 2.0 2.5 1.5 3.0 2.5 2.5 2.0 2.5 1.5 2.5 1.5 3.0 2.0 2.5 2.0 Max 17.0 12.0 14.5 10.5 14.0 9.5 13.0 9.0 14.0 10.0 13.5 10.0 12.0 9.0 12.0 9.0 13.0 11.0 12.5 10.5 74AC TA = -40C to +85C CL = 50 pF Min 3.0 2.0 2.5 1.5 2.5 1.5 2.0 1.0 2.5 2.0 2.0 1.5 2.0 1.0 2.0 1.0 2.5 1.5 2.0 1.5 Max 19.0 14.0 16.5 12.0 16.0 11.0 15.0 10.5 16.0 11.5 15.5 11.5 13.5 10.0 14.0 10.5 14.0 12.0 14.0 12.0 ns ns ns ns ns ns ns ns ns ns Unit * Voltage Range 3.3 V is 3.3 V 0.3 V. Voltage Range 5.0 V is 5.0 V 0.5 V. FACT DATA 5-5 MC74AC652 MC74ACT652 DC CHARACTERISTICS 74ACT Symbol Parameter VCC (V) TA = +25C Typ VIH VIL VOH Minimum High Level Input Voltage Maximum Low Level Input Voltage Minimum High Level Output Voltage 4.5 5.5 4.5 5.5 4.5 5.5 4.5 5.5 VOL Minimum Low Level Output Voltage 4.5 5.5 4.5 5.5 IIN ICCT IOZT Maximum Input Leakage Current Additional Max. ICC/Input Maximum 3-State Current IOLD IOHD ICC Minimum Dynamic Output Current Maximum Quiescent Supply Current 5.5 5.5 5.5 8.0 75 -75 80 mA mA A 5.5 5.5 5.5 0.6 0.6 0.001 0.001 1.5 1.5 1.5 1.5 4.49 5.49 74ACT TA = -40C to +85C Unit Conditions Guaranteed Limits 2.0 2.0 0.8 0.8 4.4 5.4 3.86 4.86 0.1 0.1 0.36 0.36 0.1 2.0 2.0 0.8 0.8 4.4 5.4 3.76 4.76 0.1 0.1 0.44 0.44 1.0 1.5 6.0 V V V VOUT = 0.1 V or VCC - 0.1 V VOUT = 0.1 V or VCC - 0.1 V IOUT = - 50 A *VIN = VIL or VIH - 24 mA IOH - 24 mA IOUT = - 50 A *VIN = VIL or VIH - 24 mA IOH - 24 mA VI = VCC, GND VI = VCC - 2.1 V VI (OE) = VIL, VIH VI = VCC, GND VO = VCC, GND VOLD = 1.65 V Max VOHD = 3.85 V Min VIN = VCC or GND V V V A mA A * All outputs loaded; thresholds on input associated with output under test. Maximum test duration 2.0 ms, one input loaded at a time. FACT DATA 5-6 MC74AC652 MC74ACT652 AC CHARACTERISTICS 74ACT Symbol Parameter VCC* (V) TA = +25C CL = 50 pF Min tPLH tPHL tPLH tPHL tPLH tPHL tPZH tPZL tPHZ tPLZ tPZH tPZL tPHZ tPLZ ts th tw Propagation Delay CPBA or CPAB to An or Bn Propagation Delay CPBA or CPAB to An or Bn Propagation Delay A or B to Bn or An Propagation Delay A or B to Bn or An Propagation Delay SBA or SAB to An or Bn Propagation Delay SBA or SAB to An or Bn Output Enable Time OEBA to An Output Enable Time OEBA to An Output Disable Time OEBA to An Output Disable Time OEBA to An Output Enable time OEAB to Bn Output Enable Time OEAB to Bn Output Enable Time OEAB to Bn Output Enable Time OEAB to Bn Setup Time, HIGH or LOW An or Bn to CPBA or CPAB Hold Time, HIGH or LOW An or Bn to CPBA or CPAB CPAB, CPBA Pulse Width HIGH or LOW 5.0 5.0 5.0 5.0 5.0 5.0 5.0 5.0 5.0 5.0 5.0 5.0 5.0 5.0 5.0 5.0 5.0 4.0 3.5 2.5 2.5 2.5 3.0 2.0 2.5 3.0 2.5 2.5 2.5 3.5 3.0 7.0 2.5 6.0 Max 14.5 14.5 11.5 11.5 12.0 12.0 11.5 11.5 13.0 12.5 12.0 12.0 13.5 13.5 74ACT TA = -40C to +85C CL = 50 pF Min 3.5 3.0 2.0 2.0 2.0 2.5 1.5 2.0 2.5 2.0 2.0 2.0 3.0 2.5 8.0 2.5 7.0 Max 16.5 16.5 13.0 13.0 13.5 13.5 13.0 13.0 14.0 14.0 13.5 13.5 14.5 15.0 ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns Unit * Voltage Range 3.3 V is 3.3 V 0.3 V. Voltage Range 5.0 V is 5.0 V 0.5 V. CAPACITANCE Symbol CIN CI/O CPD Input Capacitance Input/Output Capacitance Power Dissipation Capacitance Parameter 74ACT Typ 4.5 15 60.0 Unit pF pF pF Test Conditions VCC = 5.0 V VCC = 5.0 V VCC = 5.0 V FACT DATA 5-7 MC74AC652 MC74ACT652 OUTLINE DIMENSIONS N SUFFIX PLASTIC DIP PACKAGE CASE 724-03 ISSUE D 13 -A- 24 1 -B- 12 NOTES: 1. CHAMFERED CONTOUR OPTIONAL. 2. DIMENSION L TO CENTER OF LEADS WHEN FORMED PARALLEL. 3. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 4. CONTROLLING DIMENSION: INCH. DIM A B C D E F G J K L M N INCHES MIN MAX 1.230 1.265 0.250 0.270 0.145 0.175 0.015 0.020 0.050 BSC 0.040 0.060 0.100 BSC 0.007 0.012 0.110 0.140 0.300 BSC 0_ 15_ 0.020 0.040 MILLIMETERS MIN MAX 31.25 32.13 6.35 6.85 3.69 4.44 0.38 0.51 1.27 BSC 1.02 1.52 2.54 BSC 0.18 0.30 2.80 3.55 7.62 BSC 0_ 15_ 0.51 1.01 C -T- SEATING PLANE L K E G F D 24 PL NOTE 1 N J 24 PL M 0.25 (0.010) M M TB M 0.25 (0.010) TA M -A- 24 13 DW SUFFIX PLASTIC SOIC PACKAGE CASE 751E-04 ISSUE E NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.13 (0.005) TOTAL IN EXCESS OF D DIMENSION AT MAXIMUM MATERIAL CONDITION. MILLIMETERS MIN MAX 15.25 15.54 7.40 7.60 2.35 2.65 0.35 0.49 0.41 0.90 1.27 BSC 0.23 0.32 0.13 0.29 0_ 8_ 10.05 10.55 0.25 0.75 INCHES MIN MAX 0.601 0.612 0.292 0.299 0.093 0.104 0.014 0.019 0.016 0.035 0.050 BSC 0.009 0.013 0.005 0.011 0_ 8_ 0.395 0.415 0.010 0.029 -B- 12X P 0.010 (0.25) M B M 1 12 24X D 0.010 (0.25) M J TA S B S F R C -T- SEATING PLANE X 45 _ M 22X G K DIM A B C D F G J K M P R Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. "Typical" parameters can and do vary in different applications. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. Motorola does not convey any license under its patent rights nor the rights of others. Motorola products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the Motorola product could create a situation where personal injury or death may occur. Should Buyer purchase or use Motorola products for any such unintended or unauthorized application, Buyer shall indemnify and hold Motorola and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that Motorola was negligent regarding the design or manufacture of the part. Motorola and are registered trademarks of Motorola, Inc. Motorola, Inc. is an Equal Opportunity/Affirmative Action Employer. How to reach us: USA/EUROPE: Motorola Literature Distribution; P.O. Box 20912; Phoenix, Arizona 85036. 1-800-441-2447 MFAX: RMFAX0@email.sps.mot.com -TOUCHTONE (602) 244-6609 INTERNET: http://Design-NET.com JAPAN: Nippon Motorola Ltd.; Tatsumi-SPD-JLDC, Toshikatsu Otsuki, 6F Seibu-Butsuryu-Center, 3-14-2 Tatsumi Koto-Ku, Tokyo 135, Japan. 03-3521-8315 HONG KONG: Motorola Semiconductors H.K. Ltd.; 8B Tai Ping Industrial Park, 51 Ting Kok Road, Tai Po, N.T., Hong Kong. 852-26629298 FACT DATA 5-8 *MC74AC652/D* MC74AC652/D |
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